1. Field of the Invention
The present invention relates to a semiconductor memory.
2. Description of the Related Art
There is a demand that semiconductor memories should have a greater capacity, lower power consumption, and higher-speed access particularly if the semiconductor memories are mounted in information processing/controlling apparatuses such as computers. In order to realize lower power consumption, a certain type of semiconductor memory forcibly stops the operations of sense amplifiers belonging to those memory blocks which are not involved in data reading. This semiconductor memory also stops the operations of the reference voltage generation circuit which supplies these sense amplifiers with a reference voltage (see FIG. 2 of Japanese Patent Application Publication (Kokai) No. 2000-149569).
In this semiconductor memory, when a sense amplifier in a deactivated condition has to start data reading, the associated reference voltage generation circuit is also has to be turned on. However, it takes time from the start of the operation of the reference voltage generation circuit to when the reference voltage becomes actually ready to provide a desired voltage. Thus, certain time is spent to bring the sense amplifier into the operation condition from the stopped condition, and this hinders the high-speed data reading.